The present invention relates to a universal serial bus (USB) host system having a USB host function, and more particularly to memory access of a USB host controller.
Presently, the USB has become widespread as an interface for easily connecting peripherals to a personal computer (PC). The on-board percentage thereof has reached nearly 100%. In the USB Revision 2.0 standard (USB 2.0), in which speedup over its predecessor has been attempted, the maximum data transfer rate is defined as 480 Mbps. The USB 2.0 has therefore been increasingly adopted as the interface between AV equipment handling images and the like and PCs.
In recent years, not only PCs but also various types of equipment such as AV home appliances have been equipped with a USB host controller to have a function as a USB host, so that they are allowed to make use of various USB devices. Also, as for the USB host controller, only PC-oriented LSIs were initially available. Presently, however, LSIs intended for embedded devices and system LSIs incorporating the USB host function have been developed by various manufacturers.
USB hardware is classified into two types: USB hosts having a USB host controller and USB devices. In USB data transfer, a USB host always takes the lead to perform processing for a USB device.
USB data transfer is performed transaction by transaction, and one transaction is composed of a plurality of phases. For example, a data IN transaction is composed of a token phase in which a USB host issues IN token to a USB device, a data phase in which the USB host receives a data packet (transfer data) from the USB device, and a handshake phase in which the USB host notifies the USB device of success or failure of data reception. The maximum transfer data size that can be transferred in one transaction varies with the transfer type. The maximum transfer data size at full speed is 64 bytes in control transfer, bulk transfer and interrupt transfer, and 1023 bytes in isochronous transfer. The maximum transfer data size at high speed is 64 bytes in control transfer, 512 bytes in bulk transfer and 1024 bytes in interrupt transfer and isochronous transfer. In USB, a large size of data is transferred by repeating such a transaction.
When performing data transfer, a USB host uses management data containing information such as the transfer size, the transfer destination, the transfer state and the pointer to a transfer data buffer, to construct a transaction. When a plurality of transfer data units are to be transferred under a plurality of transactions, the USB host must read management data for each transaction to construct each transaction.
Hereinafter, a queue head (QH) and a queue element transfer descriptor (qTD), which are management data in bulk transfer according to Enhanced Host Controller Interface (EHCI) standard as a USB 2.0 conforming host controller standard, will be described.
FIG. 8 is a view showing a configuration of QH, and FIG. 9 is a view showing a configuration of qTD.
In FIG. 8, 03-00H (801) refers to data including a queue head horizontal link pointer (QHLP), 0B-04H (802) refers to the characteristics of an end point used for USB transfer, and 0F-0CH (803) refers to the current pointer to qTD and the like. Also, 2F-10H (804) refers to information on the work space for the transaction, in which the transfer results of USB transfer and the like are stored in 27-14H (805).
In FIG. 9, 07-00H (901) refers to a pointer to the next qTD, 0B-08H (902) refers to the contents of the required transaction, and 1F-0CH (903) refers to pointers to transfer data buffers and the like.
Another example of the management data other than QH and qTD described above includes an isochronous transfer descriptor (iTD) used in isochronous transfer.
A USB host controller constructs a transaction using the management data described above, and using the resultant transaction, performs data read/write to a memory for storage of USB transfer data. The USB host controller then writes the transfer results, error information and the like into the management data, and thereafter acquires management data for subsequent data transfer to construct a next transaction.
As a conventional USB host system, a technique shown in FIG. 10 is known. FIG. 10 is a block diagram showing the entire configuration of the conventional USB host system.
Referring to FIG. 10, the USB host system 1005 includes: a CPU 1010 for controlling the entire of the USB host system 1005; a USB host controller 1001 having a USB host function and controlling USB transfer; and an external module 1004 having a function other than the USB host function. Memory access to a system memory 1003 from the CPU 1010, the USB host controller 1001 and the external module 1004 is made via a memory controller (M/C) 1002. Data transfer between the USB host system 1005 and the outside is performed via a USB 1006.
In the USB host system 1005 described above, transfer data 003 transferred from/to the outside is stored in the system memory 1003. Management data 004 used for construction of a transaction at the occasion of USB transfer is prepared and stored in the system memory 1003 by the CPU 1010.
Hereinafter, an operation of the USB host system 1005 described above will be described in which moving-picture data stored in a USB memory 1011 is read into the system memory 1003 and the external module 1004 performs playback processing for the moving-picture data.
Once receiving a request for USB data transfer from the external module 1004, the CPU 1010 prepares and stores management data 004 in the system memory 1003.
Based on an instruction from the CPU 1010, the USB host controller 1001 reads the management data 004 from the system memory 1003 to construct a transaction.
The USB host controller 1001 then reads moving-picture data from the USB memory 1011 based on the constructed transaction and stores the read transfer data 003 in the system memory 1003.
The external module 1004 then reads the transfer data 003 stored in the system memory 1003 by the USB host controller 1001 for playback processing and outputs the processed results to a display and the like.
In this configuration, the transfer data 003 read from the USB memory 1011 is stored in the system memory 1003 that is shared between the USB host controller 1001 and the external module 1004. The external module 1004 can therefore process the transfer data 003.
FIG. 11 is a diagrammatic view illustrating USB data transfer and processing of management information observed in execution of a USB read transaction in the USB host system 1005 of FIG. 10.
Once a USB-related transfer request is issued, the USB host controller 1001 reads QH of the management data 004 from the system memory 1003 and performs transfer setting based on the QH to construct a transaction (step S1101). The USB host controller 1001 then executes the transaction constructed in the step S101, to read/write transfer data 003 via USB to the system memory 1003, and records the transfer results, error information and the like as the execution results in the QH (step S1102). The USB host controller 1001 then makes qTD reflect the contents of the QH recorded in the step S1102 (step S1103), and shifts to the state of reading QH for the next transfer (step S1104). Thereafter, the external module 1004 accesses the system memory 1003 for readout of the transfer data 003 (step S1105).
In the steps S1101 to S1104 described above, the USB host controller 1001 accesses the management data 004 four times at the preparation of transfer information and the updating of the transfer state, and accesses the transfer data 003 once at the writing. Thereafter, in the step S1105, the external module 1004 accesses the transfer data 003 once at the readout.
FIG. 12 is a diagrammatic view illustrating memory access observed during execution of a simple USB read transaction in the USB host system 1005 of FIG. 10.
In FIG. 12, the x-axis represents the time, and both the USB host controller 1001 and the external module 1004 access the system memory 1003.
First, the USB host controller 1001 reads management data 004 from the system memory 1003 (1201) and constructs a transaction based on the management data 004 (1202). The USB host controller 1001 then records transfer data 003 received from outside the USB host system 1005 in the system memory 1003 based on the constructed transaction (1203). The USB host controller 1001 then makes the management data 004 in the system memory 1003 reflect the transfer state in the transaction (1204). Thereafter, the external module 1004 that has asked for the USB data transfer acquires the transfer data 003 from the system memory 1003 (1205).
The USB data transfer is completed by performing the series of processing 1201 to 1205. Once the external module 1004 completes the acquisition of the transfer data 003 from the system memory 1003, execution of subsequent USB data transfer is permitted. In transfer of a plurality of transfer data units, USB transfer processing 1206 to 1210 similar to the processing 1201 to 1205 described above is performed, in which the USB host controller 1001 reads management data 004 for a new transaction and performs processing such as construction/execution of the transaction.
As a USB host system, known is a technique described in International Publication No. WO/03/079200, for example. In the technique described in this document, management data stored in a system memory is fetched to a memory in a USB host module (data fetch unit), a transaction is constructed/executed using the fetched management data, and the transfer results of the transaction are fed back to the management data in the system memory, to thereby perform USB data transfer.
However, in the USB host system 1005, if the speed of the USB data transfer becomes insufficient, moving-picture playback processing by the external module 1004, for example, may not be performed normally, causing problems such as skipping of a frame and stop of a moving picture.
In the USB data transfer in the USB host system 1005, when the external module 1004 attempts to access the transfer data 003 in the system memory 1003 while the USB host controller 1001 is accessing the management data 004 in the system memory 1003, memory access contention occurs for the system memory 1003. Likewise, when the USB host controller 1001 attempts to access the management data 004 in the system memory 1003 while the external module 1004 is accessing the transfer data 003 in the system memory 1003, memory access contention occurs for the system memory 1003. Such memory access contention also occurs in the technique described in the above document.
If access contention occurs in the USB host system 1005 as described above, an arbitration function of the CPU 1010 serves to adjust the access. In this arbitration function, when the USB host controller 1001 is accessing the management data 004 in the system memory 1003, access from the external module 1004 to the transfer data 003 in the system memory 1003 is put in the standby state. This will cause a delay in moving-picture playback. In reverse, when the external module 1004 is accessing the transfer data 003 in the system memory 1003, access from the USB host controller 1001 to the management data 004 in the system memory 1003 is put in the standby state. As a result, it will take time to construct a transaction.